*** clock.a: 4-digit led-matrix clock code equ EEPROM code location (RAM or EEPROM) *** initializing code may be overwritten by variables org RAM varbeg equ * csecs rmb 1 seconds/100 (bcd) secs rmb 1 seconds (bcd) mins rmb 1 minutes (bcd) hours rmb 1 hours (bcd) dcfsyn rmb 1 zero if dcf synch lost pwidth rmb 1 dcf pulse width pdist rmb 1 dcf pulse dist pcount rmb 1 dcf pulse count secchg rmb 1 flag from toc1 interrupt dcfcod rmb 6 dcf code: last 48 bits prty rmb 1 flag for parity check column rmb 1 current display column bright rmb 1 current display intensity varend equ * *** this is where the program starts: org code lds #$01ff clr spcr dwom off ldaa #$7e write the interrupt vector (jmp) staa toc1vec ldd #toc1int std toc1vec+1 ldaa #$80 enable oc1 interrupt staa tmsk1 ldx #varbeg varinit clr 0,x inx cpx #varend bne varinit cli unmask all interrupts jmp main *** shift 7 bits from image into display shift ldab #5 offset of char A in image mul addb column offset for column addd #image xgdx X now on right pattern ldaa 0,x bra shift3 shift1 bcc shift2 pixel off? orab #$20 data bit = 1 inc bright additional brightness shift2 stab portb andb #$bf clock low stab portb shift3 ldab #$40 prepare clock high, data low lsra bne shift1 shift done? rts *** time to pixmap dsptim clr bright inc column ldaa column cmpa #5 bne dsptim1 clra staa column dsptim1 ldab #$10 display on, column 5 tsta beq dsptim3 dsptim2 lsrb next column deca bne dsptim2 dsptim3 pshb ldaa mins psha anda #$0f jsr shift pula lsra lsra lsra lsra jsr shift ldaa hours psha anda #$0f jsr shift pula lsra lsra lsra lsra tst dcfsyn display arial if not synchron bne dsptim4 ldaa #10 tst porta bpl dsptim4 ldaa #11 dsptim4 jsr shift pulb orab #$80 display on stab portb lsl bright lsl bright lsl bright dsptim5 mul consume 10 cycles dec bright wait to increase brightness bne dsptim5 rts *** timer output compare 1 interrupt handler toc1int ldd toc1 addd #20000 next interrupt in 10ms std toc1 ldaa csecs update csecs adda #1 daa staa csecs bne toc1in1 inc secchg toc1in1 tst porta dcf signal on porta7 bpl toc1in2 clr pdist inside a pulse inc pwidth bra toc1in4 toc1in2 tst pdist ouside of pulse bne toc1in3 bset pwidth $80 flag: complete pulse toc1in3 inc pdist missing pulse if pdist > 127 toc1in4 ldaa #$80 reset flag staa tflg1 rti *** --- gap for interrupt vector (if code in RAM) --- * org toc1vec+code * fcc "123" int vector $df: put in a gap! updtim tst secchg beq updtime clr secchg ldaa secs adda #1 daa staa secs cmpa #$60 bne updtime clr secs tst dcfsyn dec dcfsyn timeout until zero beq updtim1 dec dcfsyn updtim1 ldaa mins adda #1 daa staa mins cmpa #$60 bne updtime clr mins ldaa hours adda #1 daa staa hours cmpa #$24 bne updtime clr hours updtime rts *** check dcf pulse, save pulse in dcfcod chkpls ldaa pwidth bmi chkpls1 rts chkpls1 clr pwidth anda #$7f cmpa #5 bmi chkerr cmpa #15 bpl chkpls2 clra data = 0 bra savpls chkpls2 cmpa #25 bpl chkerr ldaa #1 data = 1 savpls inc pcount ldx #dcfcod+6 savpls1 dex rora restore carry ror 0,x rola save carry cpx #dcfcod bne savpls1 done? rts chkerr clr pcount rts *** check the dcf telegram and transfer to time if ok * dcfcod+5 P3 Y Y Y Y Y Y Y 58..51 * dcfcod+4 Y M M M M M D D 50..43 * dcfcod+3 D d d d d d d P2 42..35 * dcfcod+2 h h h h h h P1 m 34..27 * dcfcod+1 m m m m m m 1 ls 26..19 * dcfcod+0 sz wz ly r x x x x 18..11 chkdcf tst pdist bmi chkdc1 rts chkdc1 ldaa pcount cmpa #44 bmi chkerr clr prty pdist >= 128 csecs clra jsr savpls shift right dcfcod, x to dcfcod ldaa dcfcod+5 jsr updprty ldaa dcfcod+4 jsr updprty ldaa dcfcod+3 jsr updprty tst prty bne chkerr jsr savpls shift right dcfcod, x to dcfcod ldaa dcfcod+2 anda #$7f jsr updprty tst prty bne chkerr ldaa dcfcod+1 jsr updprty tst prty bne chkerr ldaa dcfcod+0 is start bit set? bpl chkerr clr csecs dcf telegram ok ldaa #30 bad receive for max 30 min staa dcfsyn ldaa dcfcod+2 anda #$3f staa hours ldaa dcfcod+1 anda #$7f staa mins clr pcount chkdc3 tst pdist synch on next pulse jsr dsptim bne chkdc3 clr csecs clr secs rts *** invert prty for each bit set in acca updprty lsra bcc updprt1 com prty updprt1 tsta bne updprty rts main jsr dsptim jsr updtim jsr chkpls jsr chkdcf bra main image fcb $be,$c1,$c1,$c1,$be zero fcb $80,$81,$ff,$a1,$80 one fcb $b1,$c9,$c5,$c3,$a1 two fcb $b6,$c9,$c9,$c1,$a2 three fcb $84,$ff,$a4,$94,$8c four fcb $ce,$d1,$d1,$d1,$f2 five fcb $86,$c9,$c9,$a9,$9e six fcb $e0,$d0,$c8,$c7,$c0 seven fcb $b6,$c9,$c9,$c9,$b6 eight fcb $bc,$ca,$c9,$c9,$b0 nine fcb $b8,$80,$ef,$80,$b8 arial1 fcb $b8,$80,$8f,$80,$b8 arial2